*The Final WW Date is the final date from which you can withdraw from the unit without academic penalty, however you will still incur a financial liability (see
Withdrawal dates explained for more information).
Design of Boolean logic and finite state machines. Standard SSI, MSI and LSI components; implementation with different logic families, mainly TTL and MOS sticks; synchronous system design, ALU, memory, tri-state, and open-collector buses. Top-down design of digital systems, controller design, micro-programming, hardware implementation of arithmetic and other algorithmic processes, and use of Digital CAD tools in modern VLSI design. Modelling of digital systems using hardware description language VHDL. Implementation of complex digital systems using synthesis tools; use of field-programmable gate arrays (FPGAs) to implement digital systems.
FLEXIBLE & ONLINE STUDY OPTIONS Note: Class attendance may still be required
Resource supported teaching & learning -
H
Additional resources are provided for your optional use; e.g. audio taped lectures
About Flexible Study Options
Units are offered in attending mode unless otherwise indicated (that is attendance is required at the campus identified). A unit identified as offered by distance, that is there is no requirement for attendance, is identified with a nominal enrolment campus. A unit offered to both attending students and by distance from the same campus is identified as having both modes of study.
Campus - H Hobart, L Launceston, W Burnie. Study Centre - V Sydney, R Rozelle, P Beauty Point. Distance units may also have a campus identifier of I Isolated, N Interstate, O Overseas. Units delivered in Transnational Education (TNE) Programs have a campus identifier of A Hangzhou, F Fuzhou, G Shanghai, K KDU Malaysia, Q Kuwait or Y Hong Kong.
Special approval is required for enrolment into TNE Program units - campuses A, F, G, K, Q and Y click here for more information.
Resource supported teaching & learning -
H
